SimpleSSD: Modeling Solid State Drives for Holistic System Simulation

Existing solid state drive (SSD) simulators unfortunately lack hardware and/or software architecture models. Consequently, they are far from capturing the critical features of contemporary SSD devices. More importantly, while the performance of modern systems that adopt SSDs can vary based on their numerous internal design parameters and storage-level configurations, a full system simulation with traditional SSD models often requires unreasonably long runtimes and excessive computational resources. In this work, we propose SimpleSSD, a highfidelity simulator that models all detailed characteristics of hardware and software, while simplifying the nondescript features of storage internals. In contrast to existing SSD simulators, SimpleSSD can easily be integrated into publicly-available full system simulators. In addition, it can accommodate a complete storage stack and evaluate the performance of SSDs along with diverse memory technologies and microarchitectures. Thus, it facilitates simulations that explore the full design space at different levels of system abstraction.Comment: This paper has been accepted at IEEE Computer Architecture Letters (CAL

Efficient design and optimized crash-consistency support for hybrid memory systems

Hybrid memory systems (HMSs) pair different memory technologies within a uni ed main memory to combine the best features of those technologies, such as performance with capacity and durability. However, HMSs do not provide a cost-effective solution as a memory subsystem that can accommodate an entire data set of today's data-intensive applications due to the high cost and power limitations. To meet the ever-increasing memory capacity demand of data-intensive applications, system designers leverage the memory-mapped interface in modern operating systems (OS) to treat solid-state drives (SSD) as part of the main memory. The memory-mapped interface in the OS relies on the paging mechanism to move the data first from SSD to DRAM before the data is accessible. However, the paging mechanism incurs significant unnecessary I/O traffic and faces memory thrashing and pollution considering the irregular access patterns of data-intensive applications and the limited capacity of existing HMSs. Thanks to the byte-accessibility supported by modern SSD interfaces, accessing SSD data is achievable in both byte and block granularity today, but this is challenging due to the lack of system support. In this dissertation, FlatFlash is proposed as an optimized HMS that pairs a byte-accessible SSD with DRAM within a uni ed address space. FlatFlash extends virtual memory management to o er a uni ed memory interface so that applications are capable of directly accessing data across both SSD and DRAM in byte granularity. With the help of a proposed page promotion mechanism, FlatFlash combines the benefits of both the byte-accessible large SSD and fast DRAM by promoting only hot data to the DRAM off the critical path of execution. To fully utilize the durability aspect of SSDs, FlatFlash introduces an abstraction of byte-granular data persistence. By exploiting the byte-granular data persistence of persistent memory (PM) in HMSs, we are motivated to rethink the design primitives of the crash-consistency of several software systems, such as le systems and databases. Programming for crash-consistency involves writing transactions that are atomic and durable, which ensures that store operations to PM within a transaction persist in an all-or-none manner. Current approaches perform persist operations on the critical path of execution with strict ordering. To address these challenges, this dissertation proposes HulaPM, the first hardware undo-logging technique for persistent memory that supports asynchronous persist operations. To ensure that data is not lost, HulaPM tracks control and data dependencies between transactions in hardware and enforces that these transactions commit in the proper order. Together, these innovations enable a high-performance, cost-effective, and scalable solution for building hybrid memory systems by exploiting the vast capacity of byte-accessible SSDs and optimizing the architectural support for atomic durability.U of I OnlyAuthor requested U of Illinois access only (OA after 2yrs) in Vireo ETD syste